RadHDL 0.2.2 Getting Started

RadHDL Overview

RadHDL is the Radical Computer Technologies VHDL library for reusable FPGA building blocks. The library is organized around bus-neutral interfaces, DSP blocks, debug cores, and low-level primitive wrappers that make the same source tree usable across Xilinx, Lattice ECP5, Gowin, and generic simulator flows.

The 0.2.2 pass focuses on portability. Public cores should select behavior through generics such as VENDOR_TAG and PRODUCT_SERIES_TAG, while device-specific RAM, FIFO, CDC, and DSP details live below the RadPrimitive boundary. That keeps application-level cores and register interfaces portable without hiding the fact that FPGA primitives are vendor-specific.

RadIFRegister banks, interconnect, AXI, SPI, I2C, I2S, SMI, UART, and DMA-facing interface blocks.

RadDSPStreaming DSP, FFT, matrix, filter, modulation, detection, and numeric conversion cores.

RadILAIntegrated logic-analyzer capture and debug hub blocks for instrumented FPGA builds.

RadPrimitiveVendor-aware RAM, FIFO, CDC, and DSP wrappers used by portable higher-level cores.

Install And Use With RadBuild

RadBuild is the preferred flow when you want reproducible project setup, package selection, toolchain registration, and board-specific build recipes. For RadHDL designs, RadBuild should either consume the installed RadHDL package or point directly at a checked-out RadHDL repository.

sudo apt update
sudo apt install radbuild radbuild-radhdl
radbuild menu

Inside a RadBuild FPGA project, select the target vendor and board family, register the vendor toolchain root if it was not auto-detected, and enable the RadHDL package or packagegroup. For the open-source ECP5 path, point RadBuild at the oss-cad-suite installation. For Xilinx flows, point it at the installed Vivado root and version. For Gowin flows, point it at the Gowin EDA root.

Setting	Purpose
`radhdl.root`	Checked-out RadHDL repository path or installed package path.
`fpga.vendor`	Vendor selector such as `xilinx`, `lattice`, or `gowin`.
`fpga.family`	Family selector such as `7series`, `ultrascale_plus`, `ecp5`, or `gw5a`.
`toolchains.*.root`	Local toolchain installation root used by RadBuild project scripts.

Use With Vendor Toolchains Directly

RadHDL can also be used without RadBuild. The expected direct-toolchain pattern is to clone the RadHDL repository, add the required VHDL packages and cores to the vendor project, and set the VHDL library names consistently.

git clone https://github.com/radical-computer-technologies/RadHDL.git
cd RadHDL
git checkout radhdl-0.2.2-beta.1

VivadoUse the RadHDL Tcl manifests or add VHDL files in dependency order. Use xsim for XPM-backed primitive validation where Vivado provides the authoritative simulation body.

GHDLUse GHDL for portable RadHDL models and non-Xilinx primitive smoke tests. The simulation matrix is the reference for supported GHDL cases.

Lattice ECP5Use the Lattice primitive wrappers and oss-cad-suite for Yosys/nextpnr flows. FIFO behavior is implemented through RadHDL logic plus explicit RAM and CDC primitive boundaries.

GowinUse the Gowin wrappers and Gowin EDA installation for vendor primitive synthesis and simulation work.

Package Structure

Area	Role
`common/hdl/src/`	Shared protocol packages plus current RadPrimitive RAM, FIFO, CDC, and vendor wrapper entry points.
`common/hdl/ecp5/`	Explicit ECP5 primitive wrapper sources used by the Lattice path.
`hdl/radhdl/src/`	Generated top-level RadHDL package declarations such as `RadPrimitive` and `RadCDC`.
`interfaces/hdl/radif/`	Register, stream, peripheral, and bridge interfaces.
`dsp/hdl/raddsp/`	DSP cores and streaming math blocks.
`debug/radila/`	Debug hub and logic-analyzer capture blocks.
`projects/`	Board and toolchain projects used for smoke tests and integration examples.

Higher-level packages should depend on RadPrimitive instead of directly instantiating vendor-specific primitives. Vendor wrappers remain visible and testable, but the public design-facing interface should stay stable.

Guides And References

Designing With radif_reg_bankBuild a small software-visible register block and connect it to a RadIF host bridge. Version Change NotesRead the 0.2.2 highlights and known gaps. Type ReferenceReview shared package types and constants. Datasheet BrowserSearch generated module datasheets, ports, generics, register maps, and testbench evidence.