raddsp_axis_gain

File Header

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

library radhdl;
-- Direct entity instantiation below does not require importing the entity name.
use radhdl.dsp.all;
-- Narrower alternative: use radhdl.dsp_transform.all;

Component Declaration

component raddsp_axis_gain is
  generic (
    VENDOR : string := "xilinx";
    DEVICE_FAMILY : string := "generic";
    DATA_WIDTH : positive := 16;
    COEFF_WIDTH : positive := 18;
    COEFF_FRAC_BITS : natural := 15;
    CHANNEL_COUNT : positive := 1
  );
  port (
    m_axis_tvalid : out std_logic;
    m_axis_tready : in std_logic;
    m_axis_tdata : out std_logic_vector((CHANNEL_COUNT * DATA_WIDTH) - 1 downto 0);
    m_axis_tlast : out std_logic;
    s_axis_tvalid : in std_logic;
    s_axis_tready : out std_logic;
    s_axis_tdata : in std_logic_vector((CHANNEL_COUNT * DATA_WIDTH) - 1 downto 0);
    s_axis_tlast : in std_logic;
    clk : in std_logic;
    rst : in std_logic;
    gain_i : in std_logic_vector((CHANNEL_COUNT * COEFF_WIDTH) - 1 downto 0)
  );
end component;

Direct Entity Instantiation

u_raddsp_axis_gain : entity radhdl.raddsp_axis_gain
  generic map (
    VENDOR          => "xilinx",
    DEVICE_FAMILY   => "generic",
    DATA_WIDTH      => 16,
    COEFF_WIDTH     => 18,
    COEFF_FRAC_BITS => 15,
    CHANNEL_COUNT   => 1
  )
  port map (
    m_axis_tvalid => <m_axis_tvalid_signal>,
    m_axis_tready => <m_axis_tready_signal>,
    m_axis_tdata  => <m_axis_tdata_signal>,
    m_axis_tlast  => <m_axis_tlast_signal>,
    s_axis_tvalid => <s_axis_tvalid_signal>,
    s_axis_tready => <s_axis_tready_signal>,
    s_axis_tdata  => <s_axis_tdata_signal>,
    s_axis_tlast  => <s_axis_tlast_signal>,
    clk           => <clk_signal>,
    rst           => <rst_signal>,
    gain_i        => <gain_i_signal>
  );