radif_i2c_byte_slave

File Header

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

library radhdl;
-- Direct entity instantiation below does not require importing the entity name.
use radhdl.interfaces.all;
-- Narrower alternative: use radhdl.interfaces_i2c.all;

Component Declaration

component radif_i2c_byte_slave is
  generic (
    I2C_ADDR : std_logic_vector(6 downto 0) := "0010010"
  );
  port (
    clk : in std_logic;
    rstn : in std_logic;
    scl_i : in std_logic;
    sda_i : in std_logic;
    sda_oen : out std_logic;
    wr_addr : out std_logic_vector(7 downto 0);
    wr_data : out std_logic_vector(7 downto 0);
    wr_en : out std_logic;
    rd_addr : out std_logic_vector(7 downto 0);
    rd_data : in std_logic_vector(7 downto 0);
    rd_en : out std_logic;
    read_done : out std_logic
  );
end component;

Direct Entity Instantiation

u_radif_i2c_byte_slave : entity radhdl.radif_i2c_byte_slave
  generic map (
    I2C_ADDR => "0010010"
  )
  port map (
    clk       => <clk_signal>,
    rstn      => <rstn_signal>,
    scl_i     => <scl_i_signal>,
    sda_i     => <sda_i_signal>,
    sda_oen   => <sda_oen_signal>,
    wr_addr   => <wr_addr_signal>,
    wr_data   => <wr_data_signal>,
    wr_en     => <wr_en_signal>,
    rd_addr   => <rd_addr_signal>,
    rd_data   => <rd_data_signal>,
    rd_en     => <rd_en_signal>,
    read_done => <read_done_signal>
  );