RadBuild ECP5 OSS CAD Suite Flow

RadBuild supports a first open-source FPGA provider for Lattice ECP5 targets through OSS CAD Suite. The initial board target is the Colorlight i9 v7.2 with an LFE5U-45F-6BG381C device.

Tool Setup

Install or unpack OSS CAD Suite and point RadBuild at its root. On the development machine used for this port, the suite is installed at:

/home/jvincent/oss-cad-suite/oss-cad-suite

RadBuild sources the suite environment file before running tools. Running binaries directly from libexec is not supported on this host because the suite expects its own environment.

Project Creation

radbuild project create --template fpga-ecp5-colorlight-i9 --project-name colorlight-i9-smoke ~/radprojects
cd ~/radprojects/colorlight-i9-smoke
radbuild project validate
radbuild build fpga --system colorlight-i9-ecp5

The provider runs GHDL simulations listed in the project settings, imports VHDL through the Yosys GHDL plugin, runs synth_ecp5, places/routes with nextpnr-ecp5, and packs a .bit plus .svf with ecppack.

Main Settings Fields

• type: fpga.ecp5
• provider: oss-cad-suite
• toolchain.suite_root: OSS CAD Suite root; defaults to /home/jvincent/oss-cad-suite/oss-cad-suite.
• config.device: nextpnr ECP5 size, such as 45k.
• config.package: package, such as CABGA381.
• config.source_root: base directory for HDL and constraints.
• config.sources: VHDL source list in compile order.
• config.constraints_lpf: LPF pin/timing constraints.
• config.testbenches: optional GHDL simulations to run before synthesis.

Current Limits

The first pass verifies simulation and bitstream generation. Programming support is described in metadata through programmer_board: colorlight-i9, but hardware flashing is not part of the required acceptance path yet.